10 Questions × 2 Marks = 20 Marks | Answer ALL
6 Questions × 5 Marks = 30 Marks | Answer ANY FOUR (200–250 words)
4 Questions × 10 Marks = 40 Marks | Answer ANY THREE (400–500 words)
The instruction cycle has four stages: Fetch (retrieve instruction from memory), Decode (interpret the instruction to determine what operation to perform), Execute (carry out the operation), and Store (write results back to memory/register). The decode stage uses the control unit to interpret the opcode.
A nibble is 4 bits, exactly half a byte (8 bits). It can represent values from 0 to 15, which maps perfectly to one hexadecimal digit. This is why hex is convenient — each hex digit represents exactly one nibble. A word varies by architecture (16, 32, or 64 bits).
The AND gate outputs 1 only when ALL inputs are 1. OR outputs 1 when any input is 1. NOR is inverted OR. NAND is inverted AND. The AND gate is fundamental to conditional logic in circuits.
The ALU (Arithmetic Logic Unit) performs mathematical operations (addition, subtraction, multiplication, division) and logical operations (AND, OR, NOT, XOR, comparison). It is the computational heart of the CPU.
Convert 25 to binary by repeated division: 25÷2=12 R1, 12÷2=6 R0, 6÷2=3 R0, 3÷2=1 R1, 1÷2=0 R1. Reading remainders bottom-up: 11001. Verify: 16+8+0+0+1 = 25 ✓
ROM (Read-Only Memory) is non-volatile — it retains data without power. RAM, cache, and registers are volatile — they lose data when power is cut. ROM stores firmware, BIOS, and boot instructions. Types: PROM, EPROM, EEPROM, Flash.
A flip-flop is a bistable device that stores exactly 1 bit of data (either 0 or 1). It maintains its state until explicitly changed by input signals. 8 flip-flops make a register that stores 1 byte.
An operating system manages all hardware (CPU, memory, I/O devices) and software resources. It handles process management, memory management, file systems, device drivers, and provides a user interface. Examples: Windows, Linux, macOS.
XOR (Exclusive OR) outputs 1 when inputs are different (0,1 or 1,0) and 0 when inputs are the same (0,0 or 1,1). XOR is used in parity checkers, half adders, and encryption.
Hexadecimal uses base-16 with digits 0-9 and letters A-F (where A=10, B=11, ..., F=15). Binary is base-2, octal is base-8, decimal is base-10. Hex is popular in computing because each hex digit maps to exactly 4 binary bits.
📝 Each answer below is written to the 200–250 word exam requirement
The Von Neumann architecture, proposed by mathematician John Von Neumann in 1945, is the foundational design model for most modern computers. Its key innovation was the concept of a stored-program computer, where both program instructions and data are stored in the same memory. This was revolutionary because earlier computers had fixed programs wired into their hardware.
Components of Von Neumann Architecture:
1. Central Processing Unit (CPU): The CPU consists of two sub-units — the Arithmetic Logic Unit (ALU), which performs all mathematical and logical operations, and the Control Unit (CU), which directs the operation of the processor by fetching instructions from memory, decoding them, and coordinating the execution sequence.
2. Memory Unit: A single memory space stores both instructions and data. This is the defining characteristic of the Von Neumann model. Memory is divided into addressable locations, each holding a fixed number of bits. The Memory Address Register (MAR) holds the address being accessed, while the Memory Data Register (MDR) holds the data being read or written.
3. Input/Output (I/O) Devices: These allow the computer to communicate with the external world. Input devices (keyboard, mouse, scanner) send data to the computer, while output devices (monitor, printer, speaker) receive processed results from the computer.
4. System Bus: The bus system connects all components and consists of three buses — the Address Bus (carries memory addresses), the Data Bus (carries actual data), and the Control Bus (carries control signals).
A key limitation of this architecture is the Von Neumann bottleneck — since instructions and data share the same bus, they cannot be fetched simultaneously, limiting processing speed.
De Morgan's theorem is a fundamental principle in Boolean algebra and digital logic design, named after British mathematician Augustus De Morgan. It provides two important laws that establish the relationship between AND, OR, and NOT operations. These theorems are essential for simplifying Boolean expressions and designing efficient digital circuits.
Theorem 1: The complement of a product (AND) equals the sum (OR) of the complements. In mathematical notation: (A · B)' = A' + B'. This means that a NAND operation is equivalent to applying NOT to each input and then ORing them together.
Theorem 2: The complement of a sum (OR) equals the product (AND) of the complements. In notation: (A + B)' = A' · B'. This means that a NOR operation is equivalent to applying NOT to each input and then ANDing them together.
Significance in Digital Logic Design:
1. Circuit Simplification: De Morgan's theorems allow designers to simplify complex Boolean expressions, reducing the number of logic gates needed. Fewer gates mean lower cost, less power consumption, and smaller circuit size.
2. Gate Conversion: The theorems enable conversion between AND/OR implementations and NAND/NOR implementations. Since NAND and NOR gates are universal gates (any function can be built using only NAND or only NOR gates), De Morgan's theorems are used to convert any circuit design to use only universal gates.
3. Expression Manipulation: When simplifying expressions by hand or using Karnaugh maps, De Morgan's theorems are frequently applied to break down or recombine complemented expressions, making the simplification process systematic and reliable.
Digital circuits are classified into two broad categories: combinational circuits and sequential circuits. Both are fundamental building blocks of digital systems, but they differ significantly in their operation and design.
Combinational Circuits: These circuits produce output solely based on the current inputs. They have no memory or feedback — the output at any given moment depends only on the present combination of inputs, not on any previous inputs. The same input combination always produces the same output.
Examples of combinational circuits include: Adders (half adder, full adder) that perform binary addition; Multiplexers (MUX) that select one input from multiple sources; Decoders that convert binary codes to specific output lines; and Encoders that convert specific input lines to binary codes.
Sequential Circuits: These circuits produce output based on both the current inputs AND the previous state (history) of the circuit. They contain memory elements (flip-flops or latches) that store the previous state, creating a feedback loop. This means the same input can produce different outputs depending on the circuit's current state.
Examples of sequential circuits include: Flip-flops (SR, JK, D, T) that store one bit of data; Counters that count clock pulses in sequence; Registers that store groups of bits; and Shift registers that shift data bits through a chain of flip-flops.
Key Differences: Combinational circuits are faster since they have no memory overhead, while sequential circuits are more versatile because they can implement stateful behavior. Combinational circuits are used for data processing, while sequential circuits are used for data storage and timing control.
A flip-flop is a fundamental sequential circuit element that can store exactly one bit of binary data (either 0 or 1). It is a bistable multivibrator, meaning it has two stable states and remains in one state until an external signal causes it to switch to the other. Flip-flops are the basic building blocks of registers, counters, and memory units in digital systems.
Basic Structure: A flip-flop consists of logic gates (typically NAND or NOR gates) connected in a cross-coupled feedback configuration. This feedback loop is what creates the memory property — the output feeds back to the input, maintaining the current state. Most flip-flops have two outputs: Q (normal output) and Q' (complement output).
Types of Flip-Flops:
1. SR (Set-Reset) Flip-Flop: Has two inputs — S (Set) and R (Reset). When S=1, R=0, the output Q is set to 1. When S=0, R=1, Q is reset to 0. When S=0, R=0, the previous state is maintained. The condition S=1, R=1 is invalid as it creates an undefined state.
2. D (Data) Flip-Flop: Has a single data input D and a clock input. On the active edge of the clock, the output Q takes the value of D. This eliminates the invalid state problem of the SR flip-flop and is widely used in registers and data storage.
3. JK Flip-Flop: An enhanced version of the SR flip-flop that resolves the invalid state. When J=1, K=1, the output toggles (switches from 0 to 1 or 1 to 0). It is the most versatile flip-flop type.
4. T (Toggle) Flip-Flop: Has a single input T. When T=1, the output toggles on each clock pulse. When T=0, the output remains unchanged. T flip-flops are commonly used in counter circuits.
Number system conversions are essential operations in digital computing. Computers operate in binary (base-2), but humans prefer decimal (base-10), and programmers frequently use hexadecimal (base-16) for compact representation.
(a) (101110)₂ to Decimal: To convert binary to decimal, multiply each bit by its positional weight (power of 2) and sum the results. Starting from the rightmost bit (position 0): 0×2⁰ + 1×2¹ + 1×2² + 1×2³ + 0×2⁴ + 1×2⁵ = 0 + 2 + 4 + 8 + 0 + 32 = 46.
(b) (255)₁₀ to Binary: To convert decimal to binary, repeatedly divide by 2 and record the remainders: 255÷2=127 R1, 127÷2=63 R1, 63÷2=31 R1, 31÷2=15 R1, 15÷2=7 R1, 7÷2=3 R1, 3÷2=1 R1, 1÷2=0 R1. Reading remainders from bottom to top: 11111111. This makes sense because 255 = 2⁸ - 1, which is all 1s in 8 bits.
(c) (6A)₁₆ to Decimal: To convert hexadecimal to decimal, multiply each digit by its positional weight (power of 16). In hex, A=10. So: 6×16¹ + A×16⁰ = 6×16 + 10×1 = 96 + 10 = 106.
Summary of Methods: Binary to decimal uses positional multiplication and addition. Decimal to binary uses successive division by 2. Hexadecimal to decimal uses positional multiplication with base 16. These conversion techniques are fundamental to understanding how computers represent and process numbers internally, and they form the basis for studying computer architecture and digital logic design.
Registers are the smallest and fastest storage elements in a computer system. They are located within the CPU and are used to temporarily hold data, instructions, and addresses during processing. Registers operate at the same speed as the processor, making them significantly faster than cache or main memory.
1. Accumulator (ACC): The accumulator is a general-purpose register that stores the result of arithmetic and logical operations performed by the ALU. After an operation, the result is typically placed in the accumulator for further processing or storage.
2. Program Counter (PC): Also known as the Instruction Pointer, the PC holds the memory address of the next instruction to be fetched and executed. After each instruction fetch, the PC is automatically incremented to point to the next sequential instruction. Branch and jump instructions modify the PC to change the execution flow.
3. Instruction Register (IR): The IR holds the currently executing instruction after it has been fetched from memory. The control unit reads the IR to decode the instruction and determine what operation to perform.
4. Memory Address Register (MAR): The MAR holds the address of the memory location that the CPU wants to read from or write to. When the CPU needs to access memory, it places the target address in the MAR, which is then sent over the address bus.
5. Memory Data Register (MDR): Also called the Memory Buffer Register, the MDR holds the data being transferred to or from memory. For a read operation, data from memory is placed in the MDR. For a write operation, data from the CPU is placed in the MDR before being written to memory.
6. Stack Pointer (SP): The SP holds the address of the top of the stack in memory. The stack is used for function calls, local variables, and return addresses.
📝 Each answer below is written to the 400–500 word exam requirement
A computer system is an integrated assembly of hardware components that work together to receive, process, store, and deliver information. Every computer, regardless of its size or purpose, consists of five major functional units that collaborate to perform tasks. Understanding these units and their interactions is fundamental to computer science.
1. Input Unit: The input unit is responsible for accepting data and instructions from the external environment and converting them into a form the computer can understand (binary). Input devices include the keyboard, mouse, scanner, microphone, touchscreen, barcode reader, and webcam. The input unit performs three functions: it accepts data from input devices, converts data into machine-readable binary format, and transfers the converted data to the computer's memory for processing. Without input devices, the computer would have no way to receive information from users or external sources.
2. Central Processing Unit (CPU): The CPU is the brain of the computer, responsible for executing instructions and controlling all operations. It consists of two sub-units:
a) Arithmetic Logic Unit (ALU): The ALU performs all computational operations. Arithmetic operations include addition, subtraction, multiplication, and division. Logical operations include comparisons (greater than, less than, equal to) and Boolean operations (AND, OR, NOT, XOR). The ALU receives data from registers, processes it, and sends the result back to registers or memory.
b) Control Unit (CU): The CU directs and coordinates the activities of all other units. It fetches instructions from memory, decodes them to determine the required operation, generates control signals to direct the ALU and other components, and manages the timing and sequencing of operations. The CU does not process data itself — it orchestrates how data flows between other components.
3. Memory Unit: The memory unit stores data, instructions, and intermediate results. It is divided into two categories:
a) Primary Memory (Main Memory): Directly accessible by the CPU. RAM (Random Access Memory) is volatile and stores currently running programs and data. ROM (Read Only Memory) is non-volatile and stores firmware and boot instructions. Primary memory is fast but limited in capacity and relatively expensive.
b) Secondary Memory (Auxiliary Storage): Used for permanent storage of data and programs. Examples include hard disk drives (HDD), solid-state drives (SSD), USB flash drives, CDs, DVDs, and magnetic tapes. Secondary memory is slower than primary memory but offers much larger storage capacity at lower cost.
4. Output Unit: The output unit converts processed information from binary format into a human-readable form. Output devices include monitors (visual output), printers (hard copy output), speakers (audio output), projectors, and plotters. The output unit accepts results from memory, converts them from machine code to human-understandable format, and delivers them through appropriate output devices.
5. System Bus: The system bus is the communication pathway that connects all functional units. It consists of three types: the Data Bus (transfers actual data between components), the Address Bus (carries memory addresses), and the Control Bus (carries control and timing signals). The bus width (number of lines) determines how much data can be transferred simultaneously.
All five units work in coordination through the instruction cycle: Fetch (get instruction from memory) → Decode (interpret the instruction) → Execute (perform the operation) → Store (save results). This cycle repeats billions of times per second in modern processors.
Boolean algebra is a mathematical system developed by George Boole in the 1850s for analyzing and simplifying logical expressions. In digital electronics, Boolean algebra is used to describe and optimize logic circuits. It operates on binary variables (0 and 1) using three fundamental operations: AND (·), OR (+), and NOT (complement, denoted by ' or overbar).
Fundamental Laws of Boolean Algebra:
1. Identity Law: A + 0 = A and A · 1 = A. Adding 0 or multiplying by 1 does not change the value.
2. Null Law: A + 1 = 1 and A · 0 = 0. ORing with 1 always gives 1; ANDing with 0 always gives 0.
3. Idempotent Law: A + A = A and A · A = A. A variable ORed or ANDed with itself gives itself.
4. Complement Law: A + A' = 1 and A · A' = 0. A variable ORed with its complement gives 1; ANDed gives 0.
5. Commutative Law: A + B = B + A and A · B = B · A. The order of operands does not matter.
6. Associative Law: A + (B + C) = (A + B) + C and A · (B · C) = (A · B) · C. Grouping does not affect the result.
7. Distributive Law: A · (B + C) = A·B + A·C and A + (B·C) = (A+B) · (A+C). AND distributes over OR and vice versa.
8. Absorption Law: A + A·B = A and A · (A + B) = A. A variable absorbs terms containing itself.
9. De Morgan's Theorems: (A + B)' = A' · B' and (A · B)' = A' + B'. These are essential for converting between AND/OR and NAND/NOR implementations.
Example Simplification:
Simplify: Y = A·B + A·B' + A'·B
Step 1: Factor A from first two terms: Y = A·(B + B') + A'·B
Step 2: Apply complement law (B + B' = 1): Y = A·1 + A'·B
Step 3: Apply identity law (A·1 = A): Y = A + A'·B
Step 4: Apply absorption theorem: Y = A + B
The expression has been simplified from three product terms with six literals to just two variables. This means the circuit implementation requires only one OR gate instead of multiple AND and OR gates, saving cost, space, and power consumption.
Significance of Simplification: Simplified Boolean expressions result in circuits with fewer logic gates, which means reduced hardware cost, lower power consumption, faster operation, and increased reliability. In practice, Karnaugh maps (K-maps) and the Quine-McCluskey method are used alongside algebraic simplification for systematic optimization of Boolean expressions.
Logic gates are the fundamental building blocks of all digital circuits. They are electronic devices that implement Boolean functions, accepting one or more binary inputs and producing a single binary output. Understanding logic gates is essential for designing any digital system, from simple calculators to complex microprocessors.
Basic Logic Gates:
1. AND Gate: Produces output 1 only when ALL inputs are 1. For two inputs: Y = A · B. Truth table: (0,0)→0, (0,1)→0, (1,0)→0, (1,1)→1. The AND gate is used for conditional operations — the output is true only when every condition is met.
2. OR Gate: Produces output 1 when ANY input is 1. For two inputs: Y = A + B. Truth table: (0,0)→0, (0,1)→1, (1,0)→1, (1,1)→1. The OR gate is used when at least one condition must be satisfied for the output to be true.
3. NOT Gate (Inverter): Has only one input and produces the complement (opposite) of that input. Y = A'. If input is 0, output is 1, and vice versa. The NOT gate is the simplest logic gate and is essential for implementing complemented functions.
Derived Logic Gates:
4. XOR (Exclusive OR) Gate: Produces output 1 when inputs are DIFFERENT. Y = A ⊕ B. Truth table: (0,0)→0, (0,1)→1, (1,0)→1, (1,1)→0. XOR is used in parity checkers, half adders, and encryption algorithms.
5. XNOR Gate: Produces output 1 when inputs are the SAME. Y = (A ⊕ B)'. Truth table: (0,0)→1, (0,1)→0, (1,0)→0, (1,1)→1. XNOR is the complement of XOR and is used in equality comparators.
Universal Logic Gates:
Universal gates are special because any Boolean function can be implemented using only one type of universal gate. This property is extremely valuable in manufacturing and circuit design.
6. NAND Gate: Produces the complement of AND. Y = (A · B)'. Truth table: (0,0)→1, (0,1)→1, (1,0)→1, (1,1)→0. NAND is a universal gate — any logic function (AND, OR, NOT, XOR, etc.) can be constructed using only NAND gates. For example: NOT using NAND: connect both inputs of a NAND gate together (A NAND A = A'). AND using NAND: NAND followed by another NAND as NOT. OR using NAND: NOT each input using NAND, then NAND the results.
7. NOR Gate: Produces the complement of OR. Y = (A + B)'. Truth table: (0,0)→1, (0,1)→0, (1,0)→0, (1,1)→0. Like NAND, NOR is also a universal gate — any logic function can be built using only NOR gates.
Why Universal Gates Matter: In integrated circuit (IC) manufacturing, it is more economical to produce chips containing only one type of gate. NAND gates are preferred in practice because they are faster and cheaper to manufacture using CMOS technology. The ability to implement any function using only NAND (or NOR) gates, proven through De Morgan's theorems, is a cornerstone of practical digital circuit design.
The memory hierarchy is a structured arrangement of different types of memory in a computer system, organized by speed, capacity, cost, and proximity to the CPU. The hierarchy is designed to provide the best combination of high speed and large storage capacity by using multiple levels of memory, each with different characteristics. Understanding the memory hierarchy is fundamental to computer architecture and system performance.
Principle of Memory Hierarchy: The hierarchy operates on two important principles: locality of reference (programs tend to access the same data and instructions repeatedly) and cost-performance tradeoff (faster memory is more expensive per bit). By keeping frequently accessed data in faster, smaller memories and less-used data in slower, larger memories, the system achieves an effective balance between speed and capacity.
Levels of Memory (Top to Bottom — Fastest to Slowest):
1. Registers: Located inside the CPU, registers are the fastest and smallest memory. They store data currently being processed by the ALU. Access time is less than 1 nanosecond. A typical CPU has 16 to 64 registers, each holding 32 or 64 bits. Examples include the Accumulator, Program Counter, Instruction Register, and Stack Pointer.
2. Cache Memory: Cache is a small, high-speed memory located between the CPU and main memory. It stores copies of frequently accessed data and instructions from main memory, allowing the CPU to access them without the delay of fetching from slower RAM. Modern processors have multiple cache levels: L1 cache (smallest, fastest, 32-64 KB, inside the CPU core), L2 cache (larger, slightly slower, 256 KB - 1 MB), and L3 cache (largest, shared among CPU cores, 4-32 MB). Cache hit occurs when needed data is found in cache; cache miss occurs when the CPU must fetch from main memory.
3. Primary Memory (Main Memory/RAM): RAM (Random Access Memory) is the main working memory of the computer. It stores currently running programs, operating system components, and active data. RAM is volatile — it loses all data when power is turned off. Types include DRAM (Dynamic RAM, used for main memory, cheaper but slower, requires refreshing) and SRAM (Static RAM, used for cache, faster but more expensive, does not need refreshing). Typical capacity ranges from 4 GB to 64 GB in modern systems.
4. ROM (Read-Only Memory): ROM is non-volatile memory that permanently stores essential programs like the BIOS (Basic Input/Output System) and firmware. Data in ROM is written during manufacturing and cannot be easily modified. Types include PROM (Programmable ROM, written once), EPROM (Erasable PROM, erased by UV light), EEPROM (Electrically Erasable PROM), and Flash memory (used in USB drives and SSDs).
5. Secondary Memory (Auxiliary Storage): Secondary memory provides permanent, non-volatile storage for large volumes of data and programs. It is much slower than primary memory but offers vastly greater capacity at much lower cost per bit. Types include Hard Disk Drives (HDD, magnetic storage, 1-20 TB), Solid State Drives (SSD, flash-based, faster than HDD, 256 GB - 8 TB), optical discs (CD, DVD, Blu-ray), and magnetic tape (used for archival and backup).
6. Tertiary/Offline Storage: This includes removable storage media like external hard drives, cloud storage, and magnetic tape libraries used for long-term archival purposes. Access times are the longest, but cost per bit is the lowest.
The memory hierarchy ensures that the most frequently needed data is always available at the fastest access speed, while the full volume of data is stored economically in slower but larger storage systems. This hierarchical approach is one of the most important design principles in modern computer architecture.